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-rw-r--r--lisp/progmodes/verilog-mode.el9
1 files changed, 7 insertions, 2 deletions
diff --git a/lisp/progmodes/verilog-mode.el b/lisp/progmodes/verilog-mode.el
index 8ddd262af3e..a9147247ac8 100644
--- a/lisp/progmodes/verilog-mode.el
+++ b/lisp/progmodes/verilog-mode.el
@@ -121,7 +121,7 @@
121;; 121;;
122 122
123;; This variable will always hold the version number of the mode 123;; This variable will always hold the version number of the mode
124(defconst verilog-mode-version "2019-05-06-28bee25-vpo-GNU" 124(defconst verilog-mode-version "2019-06-21-626dba1-vpo-GNU"
125 "Version of this Verilog mode.") 125 "Version of this Verilog mode.")
126(defconst verilog-mode-release-emacs t 126(defconst verilog-mode-release-emacs t
127 "If non-nil, this version of Verilog mode was released with Emacs itself.") 127 "If non-nil, this version of Verilog mode was released with Emacs itself.")
@@ -2910,7 +2910,7 @@ find the errors."
2910 "\\(\\<\\(import\\|export\\)\\>\\s-+\"DPI\\(-C\\)?\"\\s-+\\(\\<\\(context\\|pure\\)\\>\\s-+\\)?\\([A-Za-z_][A-Za-z0-9_]*\\s-*=\\s-*\\)?\\<\\(function\\|task\\)\\>\\)" 2910 "\\(\\<\\(import\\|export\\)\\>\\s-+\"DPI\\(-C\\)?\"\\s-+\\(\\<\\(context\\|pure\\)\\>\\s-+\\)?\\([A-Za-z_][A-Za-z0-9_]*\\s-*=\\s-*\\)?\\<\\(function\\|task\\)\\>\\)"
2911 )) 2911 ))
2912 2912
2913(defconst verilog-default-clocking-re "\\<default\\s-+clocking\\>") 2913(defconst verilog-default-clocking-re "\\<default\\s-+clocking\\s-+[A-Za-z_][A-Za-z0-9_]*\\s-*;")
2914(defconst verilog-disable-fork-re "\\(disable\\|wait\\)\\s-+fork\\>") 2914(defconst verilog-disable-fork-re "\\(disable\\|wait\\)\\s-+fork\\>")
2915(defconst verilog-extended-case-re "\\(\\(unique0?\\s-+\\|priority\\s-+\\)?case[xz]?\\|randcase\\)") 2915(defconst verilog-extended-case-re "\\(\\(unique0?\\s-+\\|priority\\s-+\\)?case[xz]?\\|randcase\\)")
2916(defconst verilog-extended-complete-re 2916(defconst verilog-extended-complete-re
@@ -11524,6 +11524,11 @@ See `verilog-auto-star' for more information.
11524The pins are printed in declaration order or alphabetically, 11524The pins are printed in declaration order or alphabetically,
11525based on the `verilog-auto-inst-sort' variable. 11525based on the `verilog-auto-inst-sort' variable.
11526 11526
11527To debug what file a submodule comes from, in a buffer with
11528AUTOINST, use \\[verilog-goto-defun] to switch buffers to the
11529point containing the given symbol (i.e. a submodule name)'s
11530module definition.
11531
11527Limitations: 11532Limitations:
11528 Module names must be resolvable to filenames by adding a 11533 Module names must be resolvable to filenames by adding a
11529 `verilog-library-extensions', and being found in the same directory, or 11534 `verilog-library-extensions', and being found in the same directory, or