Spelling fixes.

3 files changed, 5 insertions, 5 deletions

diff --git a/lisp/composite.el b/lisp/composite.el
index e0585f80880..f2f4437cadb 100644
--- a/lisp/composite.el
+++ b/lisp/composite.el
@@ -630,14 +630,14 @@ All non-spacing characters have this function in
                    ((and (= class 0)
                          (eq (get-char-code-property (lglyph-char glyph)
                                                      'general-category) 'Me))
-                    ;; Artificially layouting glyphs in an enclosing
+                    ;; Artificially laying out glyphs in an enclosing
                     ;; mark is difficult.  All we can do is to adjust
                     ;; the x-offset and width of the base glyph to
                     ;; align it at the center of the glyph of the
                     ;; enclosing mark hoping that the enclosing mark
                     ;; is big enough.  We also have to adjust the
                     ;; x-offset and width of the mark ifself properly
-                    ;; depending on how the glyph is designed
+                    ;; depending on how the glyph is designed.
 
                     ;; (non-spacing or not).  For instance, when we
                     ;; have these glyphs:
diff --git a/lisp/emacs-lisp/ert.el b/lisp/emacs-lisp/ert.el
index ed7633e2795..a131f48c488 100644
--- a/lisp/emacs-lisp/ert.el
+++ b/lisp/emacs-lisp/ert.el
@@ -436,7 +436,7 @@ failed."
 
 (cl-defmacro ert--skip-unless (form)
   "Evaluate FORM.  If it returns nil, skip the current test.
-Errors during evaluation are catched and handled like nil."
+Errors during evaluation are caught and handled like nil."
   (declare (debug t))
   (ert--expand-should `(skip-unless ,form) form
                       (lambda (inner-form form-description-form _value-var)
diff --git a/lisp/progmodes/verilog-mode.el b/lisp/progmodes/verilog-mode.el
index 7044943d5cb..e67639b671b 100644
--- a/lisp/progmodes/verilog-mode.el
+++ b/lisp/progmodes/verilog-mode.el
@@ -5460,7 +5460,7 @@ Return a list of two elements: (INDENT-TYPE INDENT-LEVEL)."
         (catch 'continue
           (cond
            ((equal (char-after) ?\{)
-            ;; block type returned based on outer contraint { or inner
+            ;; block type returned based on outer constraint { or inner
             (if (verilog-at-constraint-p)
                 (cond (inconstraint (throw 'nesting 'constraint))
                       (t            (throw 'nesting 'statement)))))
@@ -11101,7 +11101,7 @@ Templates:
   it is a good idea to do this for all connections in a template,
   as then they will work for any width signal, and with AUTOWIRE.
   See PTL_BUS becoming PTL_BUSNEW below.
- 
+
   Inside a template, a [] in a connection name (with nothing else inside
   the brackets) will be replaced by the same bus subscript as it is being
   connected to, or the [] will be removed if it is a single bit signal.